Technical Field
The disclosure is related to display technology field, and more particular to a method for forming a test pad between adjacent transistor regions and a method for performing array test on the adjacent transistor regions using the pad formed by the method.
Related Art
Among displays with small size and high resolution, it is known to the public that LTPS (Low Temperature Poly-Silicon) technology has been widely adopted due to the high mobility and stability. However, the low yield rate for LTPS displays has greatly perplexed the panel manufactures. In this respect, the array test is a necessary and prompt approach to monitor each manufacturing process.
Along with the rapid development of the mobile phone market, the parameters for mobile phones have become increasingly demanding. Among the parameters, the image resolution and narrow frame are two advertised features by the mobile phone companies. In order to efficiently find the problem more clearly, the array test is fine enough to detect each pixel. In order to satisfy the array test on the display having high image resolution, the manufactures generally adopt De-Mux to increase the efficiency. However, due to the manufacture process and the machine precision, the required height for the De-Mux and the test pad become obstacles to achieve narrow frame of a display. For example, in the current technology, all of the transistor regions on each glass substrate are arranged in the same direction. That is an adjacent fringe region at one side of each transistor region is arranged with a test pad. The occupied area is greater and it does not facilitate to achieve narrow frame of a display.